Low-voltage low-sensitivity switched-capacitor bandpass Sigma-Delta modulator

The recent explosion of interest in wireless personal communication systems motivates the development of fully integrated radio receivers. The parallel reduction of the dimension in CMOS technology, and hence higher levels of integration enables the combined integration of bandpass or baseband analog-to-digital converter along with the traditional front-end receiver building blocks. While this trend of technological achievements advances the digital technology, one of the key analog limitations of state-of-theart submicron CMOS technologies remains the restricted powersupply voltage, limited by the low-junction breakdown voltage of high density CMOS process and by the thin gate oxide, prone to voltage stress. There exist many resonator circuits to implement SC bandpass AX modulators and filters for high-frequency communication applications such as the “lossless-discrete integrator” (LDI) and “forward-Euler” (FE) types [l], two-delay loop (TDL) [2], [ 5 ] . low-pass filter [3], high-pass filter based [4] and pseudo-two-path (P2P) type [6] . The most recent ones use P2P and TDL techniques, with double sampling to increase the sampling frequency. In these previous implementations, the minimum available power supply voltage was 3 V. In our previous work, we have shown the LV implementations of SC ADCs and low-pass filters [7] based on the uiiiry-gaii~-reser (UGR) technique. Compared to the switched-opamp technique [8], this technique is suitable for operating at higher speeds, by keeping the opamp in its active operating region at all times. In this paper, we present a novel LV resonator circuit, which is functional down to I V. This resonator will be used as the main block of the LV SC bandpass AC modulator. Our aim is not only to design LV circuit but also to reduce the effects of analog circuit imperfections. The following sections will discuss the analog imperfections in one of the common resonator types, based on an LDI integrator.